README

LLVM Chapter 10 Validation

This directory contains a small LLVM IR harness for checking how current-head opt + llc lower representative division-by-constant patterns to x86_64.

Run:

./run-ch10-validation.sh

Current findings:

• Scalar signed and unsigned division by constants is already lowered well.
• Powers of two lower to shifts or shift-with-bias sequences.
• Non-power-of-two divisors lower to magic-multiply sequences.
• Quotient/remainder pairs by the same constant share work instead of duplicating the division logic.
• Even divisors such as 14 may use a pre-shift before the magic multiply when profitable.

From this pass, there is no clear Chapter 10 scalar x86_64 bug-report candidate comparable to the Chapter 8 mulhi miss or the Chapter 9 hi:lo / d miss.