Takashi's Notes

README

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LLVM Chapter 7 Validation

This directory contains a small LLVM IR harness for checking how current-head opt + llc lower representative Chapter 7 bit and byte rearrangement patterns to x86_64.

Run:

./run-ch7-validation.sh

Current findings:

  • Manual 32-bit byte-swap is recognized and converted to llvm.bswap.i32, then lowered to bswapl.
  • Both intrinsic and manual Hacker’s Delight bitreverse networks are recognized and converted to llvm.bitreverse.
  • On this host CPU, bitreverse lowers to a vgf2p8affineqb sequence followed by bswap.
  • So far, the tested 32-bit Chapter 7 rearrangement patterns are handled well.
  • I have not yet found a strong Chapter 7 scalar x86_64 bug-report candidate comparable to the Chapter 8 and Chapter 9 misses.

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